
#ifndef _MPI_H_
#define _MPI_H_

#include "mpi_lib.h"
#include "mdi_common.h"
#include "mpi_vo.h"
#include "mpi_vdec.h"
#include "lcd_common.h"
#include "sensor_common.h"

#ifdef  __cplusplus
extern "C"
{
#endif


#define SGKS_MPI_CHECK_MEM_PAGE_ALIGN(_ptr, _size, _ret)                       			\
	if (_ptr % _size != 0)						\
    {																							\
    	Printf("mem align err: [0x%x]\n",_ptr); \
        return _ret;														\
    }


//#define MPI_CMD_PRINT

#ifdef MPI_CMD_PRINT

#define mpi_cmd(cmd, arg)        \
	printf("%s: "#arg" = %d\n", __func__, (u32)cmd.arg);
#define mpi_cmd_hex(cmd,arg)     \
	printf("%s: "#arg" = 0x%x\n", __func__, (u32)cmd.arg);

#else

#define mpi_cmd(cmd, arg)
#define mpi_cmd_hex(cmd,arg)

#endif


#define MPI_HANDLE_SHMID  (0x2136)

// to fw
typedef struct __sgks_fw_init_param_dsp
{
    //
    u32 *default_binary_data_ptr;
    u32 *cmd_data_ptr;
    u32 cmd_data_size;
    u32 *result_queue_ptr;
    u32 result_queue_size;
    u32 dram_print_buf_addr;
    u32 cvbs_dma_reg_info;
    u32 msg_addr_arm_osd;
    u32 operation_mode;
    u32 *default_config_ptr;
    u32 default_config_size;
    u32 *DSP_buf_ptr;
    u32 DSP_buf_size;
    u32 *dsp2_info_ptr;
    u32 *pjpeg_buf_ptr;
    u32 pjpeg_buf_size;
    u32 *chip_id_ptr;
    u32 reserved_2;
    u32 dram_printf_buf_size;
    u32 reserved[13];

	#ifdef MEM_FW_DEBUG
	dsp_init2_data_s dsp_init2_data;
	#endif
	
} sgks_fw_init_param_dsp_s;


typedef struct sgks_system_setup_info_ex_s
{
	u16 voA_osd_blend_enable;
	u16 voB_osd_blend_enable;
	u16 coded_bits_interrupt_enable;
	u8  pip_size_enable;
	u8  low_delay_cap_enable : 1;   /* only works when M = 1 mode, to reduce total encoding delay from capture stage*/
	u8  reserved : 7;
	u32 audio_clk_freq;
} sgks_system_setup_info_ex_t;

typedef enum
{
	SGKS_SOURCE_BUFFER_TYPE_OFF        = 0,    // source buffer disabled
	SGKS_SOURCE_BUFFER_TYPE_ENCODE     = 1,    // source buffer for encoding
	SGKS_SOURCE_BUFFER_TYPE_PREVIEW    = 2,    // source buffer for preview
} sgks_source_buffer_type_ex_t;

typedef enum
{
	SGKS_SOURCE_BUFFER_STATE_UNKNOWN   = 0,    // uninitialized or unconfigured
	SGKS_SOURCE_BUFFER_STATE_IDLE      = 1,    // configured, but not used by any stream to encode
	SGKS_SOURCE_BUFFER_STATE_BUSY      = 2,    // configured and used by at least one stream to encode
	SGKS_SOURCE_BUFFER_STATE_ERROR     = 255,  // known error
} sgks_source_buffer_state_ex_t;

typedef enum
{
	MPI_MODULE_SYS_ID        = 0,    
	MPI_MODULE_VIN_ID,    
	MPI_MODULE_ISP_ID,   
	MPI_MODULE_VOUT_ID,   
	MPI_MODULE_VENC_ID,
	MPI_MODULE_VDEC_ID,  
	MPI_MODULE_CAP_ID,
	MPI_MODULE_OSD_ID,
} sgks_mpi_module_id_e;

typedef enum
{
	MPI_MODULE_STATUS_NOINIT        = 0,    
	MPI_MODULE_STATUS_INIT,        
} sgks_mpi_module_init_status_e;

typedef struct sgks_source_buffer_format_ex
{
	u32 id;
	u16 width;              // width of source buffer
	u16 height;             // height of source buffer
	u16 input_width;        // width of input window
	u16 input_height;       // height of input window
	u16 input_offset_x;     // offset x of input window
	u16 input_offset_y;     // offset y of input window

	/*
	 * 0: (DEINTLC_OFF), interlaced VI will be encoded into interlaced
	 *     video(field encoding)
	 * 1 :DEINTLC_BOB_MODE 2: DEINTLC_WEAVE_MODE
	 */
	u8  deintlc_for_intlc_vi;
	u8  intlc_scan;    // 0: (INTLC_OFF)  1: (INTLC_ON) use progressive VI to encode interlaced video

	/*
	 *  S2: 0: after warping, MCTF and PM are performed;
	 *         1: before warping, MCTF and PM are performed
	 */
	u8  unwarp;
	u8  reserved;
}sgks_source_buffer_format_ex_t;

typedef struct sgks_source_buffer_property_ex
{
	u32    max_width;
	u32    max_height;
	u32    max_zoom_in_factor;
	u32    max_zoom_out_factor;
} sgks_source_buffer_property_ex_t;

typedef struct sgks_source_buffer_ex_s
{
	sgks_source_buffer_type_ex_t           type;
	sgks_source_buffer_state_ex_t          state;
	sgks_source_buffer_format_ex_t         format;
	sgks_source_buffer_property_ex_t       property;
	u8    									preview_framerate_division_factor;
	u8    									reserved[3];
	u32    									ref_count;
} sgks_source_buffer_ex_t;


#define MEDIA_STREAM_MAX_NUM_IMPL       (8)


typedef struct stream_encode_size_limit_s
{
	int width;
	int height;
} stream_encode_size_limit_t;

typedef struct sgks_system_resource_setup_ex_s
{
	u16 main_source_buffer_max_width;
	u16 main_source_buffer_max_height;
	u16 second_source_buffer_max_width;
	u16 second_source_buffer_max_height;
	u16 third_source_buffer_max_width;
	u16 third_source_buffer_max_height;
	u16 fourth_source_buffer_max_width;
	u16 fourth_source_buffer_max_height;

	u16 vo_max_width;    //VO with HDMI/CVBS
	u16 vo_max_height;
	u8  stream_max_GOP_M[MEDIA_STREAM_MAX_NUM_IMPL] ;
	u8  stream_max_GOP_N[MEDIA_STREAM_MAX_NUM_IMPL] ;
	u8  stream_max_advanced_quality_model[MEDIA_STREAM_MAX_NUM_IMPL] ;
	stream_encode_size_limit_t  stream_max_encode_size[MEDIA_STREAM_MAX_NUM_IMPL] ;
	u8  MCTF_possible ;
	u8  max_num_encode_streams;
	u8  max_num_cap_sources;
	u8  total_memory_size;    // Read-only;
	u32 cavlc_max_bitrate;

	u8  encode_mode;
	u8  rotate_possible;
	u8  hdr_exposures_num;      // Only work in HDR frame or HDR line mode, range 2~5
	u8  oversampling_disable;
	u8  hd_sdi_mode;            // hd sdi mode (low delay preview)
	u8  reserved[3];
} sgks_system_resource_setup_ex_t;

typedef struct sgks_mpi_vin_global_info
{
	// 3A Pipeline related
	int                 high_mega_pixel_enable;
	// EIS related
	u32                 pipeline_id;
	u32                 cmdReadDly;
} sgks_mpi_vin_global_info_s;


typedef struct __sgks_default_enc_binary_data
{
    u32 magic_number;
    u32 manufacture_id;
    u32 fw_version;
    u32 dram_addr_icore_default_cfg;
    u32 dram_addr_luma_huf_tab;
    u32 dram_addr_chroma_huf_tab;
    u32 dram_addr_mctf_cfg_buffer;
    u32 dram_addr_cabac_ctx_tab;
    u32 dram_addr_jpeg_out_bit_buffer;      // BSB start addr
    u32 dram_addr_cabac_out_bit_buffer;     // BSB start addr
    u32 dram_addr_bit_info_buffer;          // Bits INFO BUFFER addr
    u32 jpeg_out_bit_buf_sz;                // BSB size
    u32 h264_out_bit_buf_sz;                // BSB size
    u32 bit_info_buf_sz;                    // Bits INFO BUFFER size
    u32 mctf_cfg_buf_sz;
} sgks_default_enc_binary_data_s;


typedef struct __sgks_mpi_vdec_manager
{

    u8							 *buff_start;
	u8							 *buff_end;
	sgks_decode_file_state_e	 decing_flags;
	sgks_h264_decode_t 			 vdec_info;
	sgks_mjpeg_decode_t 		 vdec_mjpeg_info;
	sgks_mpi_vdec_PlayControl_s  PlayControl;
	
} sgks_mpi_vdec_manager_s;

typedef struct sgks_fw_load_tag_s
{
	u8  magic[8];
	u8  bin_name[8];
	int vstamp;
	int offset;
} sgks_fw_load_tag_t;

typedef struct __sgks_mpi_manager
{
    int driver_handle[MAX_MPI_MODULE_NUM]; //mdi
    u32 curr_module_id;
    u32 shm_id;
	int sensor_handle[MAX_VI_NUM][MAX_MPI_MODULE_NUM];
	int mpi_vo_handle[MAX_VO_NUM];
	int mpi_module_initStatus;/*see sgks_mpi_module_id_e*/
		
	int 			            		mpi_vo_num;
    sgks_vo_dev_info_s          		mpi_vo_dev[MAX_VO_NUM];
	sgks_system_setup_info_ex_t 		system_setup;
	sgks_source_buffer_ex_t     		system_source_buff[MAX_SOURCE_BUFFER_NUM];
    sgks_system_resource_setup_ex_t 	system_resource;
	sgks_mdi_main_mpi_s					isp_CB;
	void 								*ispToImageHandle;
	sgks_mpi_vin_global_info_s          vin_global_info;
	sgks_mpi_vdec_manager_s          	vdec_manager;
	u8									*cap_base_ptr_vir;
	u8									fw_version[64];
	
    //user set
    sgks_preview_config_s       		preview_config;
    sgks_mpi_vi_device_s 				vi_device;
    sgks_mpi_init_s      				mpi_init_param;
	sgks_isp_initParam_s 				isp_init_param;
	sgks_mpi_vdec_init_Param_s			vdec_init_param;
	sgks_mpi_cap_init_param_s   		cap_init_param;
	
} sgks_mpi_manager_s;




sgks_mpi_manager_s *mpi_get_managerHanle();

#ifdef  __cplusplus
}
#endif


#endif

